ENEL353-08W (C) Whole Year 2008

Computer Hardware Engineering I

24 points

Details:
Start Date: Monday, 25 February 2008
End Date: Sunday, 16 November 2008
Withdrawal Dates
Last Day to withdraw from this course:
  • Without financial penalty (full fee refund): Sunday, 9 March 2008
  • Without academic penalty (including no fee refund): Sunday, 7 September 2008

Description

Digital logic. Data representation. Digital components and signals. Combinational and sequential logic design and realisation. Microprocessor system design and programming. Simple and complex programmable logic devices. Hardware description languages and introduction to VHDL. CPU design and Field Programmable Gate Arrays (FPGAs).

Prerequisites

(1) ENEL206 or both ENCE208 and ENCE221; (2) Subject to approval of the Head of Department

Course Coordinator / Lecturer

Steve Weddell

Lecturer

Russ Webb

Assessment

Assessment Due Date Percentage 
Digital Logic Project 10%
MCU Project Demo/Inspection 1 (P1) 6%
Programmable Logic Lab 5%
Final Examination 40%
Demo FPGA 8%
FPGA Report (P2) 12%
MCU Project (P1) 9%
Test 10%

Textbooks / Resources

Recommended Reading

Brown, Stephen D. , Vranesic, Zvonko G; Fundamentals of digital logic with VHDL design ; 2nd ed; McGraw-Hill Companies, 2005.

Furber, Stephen B; ARM system-on-chip architecture ; 2nd ed; Addison-Wesley, 2000.

Indicative Fees

Domestic fee $1,020.00

International fee $4,840.00

* All fees are inclusive of NZ GST or any equivalent overseas tax, and do not include any programme level discount or additional course-related expenses.

For further information see Electrical and Computer Engineering .

All ENEL353 Occurrences

  • ENEL353-08W (C) Whole Year 2008
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