ENEL353-07W (C) Whole Year 2007

Computer Hardware I

24 points

Details:
Start Date: Monday, 26 February 2007
End Date: Thursday, 15 November 2007
Withdrawal Dates
Last Day to withdraw from this course:
  • Without financial penalty (full fee refund): Sunday, 11 March 2007
  • Without academic penalty (including no fee refund): Sunday, 9 September 2007

Description

Digital logic. Data representation. Digital components and signals. Combinational and sequential logic design and realisation. Microprocessor system design and programming. Simple and complex programmable logic devices. Hardware description languages and introduction to VHDL. CPU design and Field Programmable Gate Arrays (FPGAs).

Prerequisites

Subject to approval of the Head of Department.
ENEL206 or both ENEL208 and ENEL221.

Course Coordinator / Lecturer

Steve Weddell

Lecturer

Russ Webb

Assessment

Assessment Due Date Percentage 
Inspection FPGA 7%
MCU Project (P1) 10%
Report 2 (P2) 8%
Final Examination 40%
D1 Lab report 4%
D2 Lab Report 4%
FPGA Lab PLA1 5%
FPGA Lab PLA2 5%
MCU Project Demo Insp (P1) 7%
Test 10%

Textbooks / Resources

Recommended Reading

Brown, Stephen D. , Vranesic, Zvonko G; Fundamentals of digital logic with VHDL design ; 2nd ed; McGraw-Hill Companies, 2005.

Furber, Stephen B; ARM system-on-chip architecture ; 2nd ed; Addison-Wesley, 2000.

To be Advised

Course links

Library portal

Indicative Fees

Domestic fee $971.00

International fee $4,600.00

* All fees are inclusive of NZ GST or any equivalent overseas tax, and do not include any programme level discount or additional course-related expenses.

For further information see Electrical and Computer Engineering .

All ENEL353 Occurrences

  • ENEL353-07W (C) Whole Year 2007
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